This application claims the benefit of Korean Patent Application No. 1998-55053, filed on Dec. 15, 1998, which is hereby incorporated by reference.
1. Field of the Invention
This invention relates to a liquid crystal display device, in particular to a liquid crystal display device having a TFT (thin film transistor) as a switching element and manufacturing method thereof.
2. Description of Conventional Art
A liquid crystal display (LCD) device employing a thin film transistor (TFT) as a switching element is typically called a thin film transistor-liquid crystal display (a TFT-LCD) device.
The semiconductor layer of the TFT is usually made of an amorphous silicon. But an amorphous silicon thin film transistor (a-Si:H TFT) has some disadvantages such as high cost and low reliability when compared with a cathode-ray tube (CRT). This is because the price of a drive circuit to operate the TFT is expensive and the amorphous silicon thin film transistor requires excessive amounts of lead lines to connect the outer drive circuit.
To solve these problems, employing polycrystalline silicon (hereinafter referred to simply as xe2x80x9cPoly-Sixe2x80x9d) as a semiconductor layer of the switching element of TFT-LCD device has been suggested. Using Poly-Si, a thin film transistor and the drive circuit can be arranged on a same substrate, which enables the production of a TFT-LCD device without any additional processes to connect the pixel array substrate with the drive circuit as required in the reproduction of the amorphous silicon TFT-LCD device.
Below is a description about a conventional TFT-LCD device using Poly-Si as a semiconductor layer with reference to the drawings.
In general, a TFT-LCD is comprised of a lower back light, a TFT array substrate called a lower substrate and a color filter substrate called an upper substrate. FIGS. 1a to 1h illustrate the manufacturing process of the TFT array substrate according to a conventional art.
First, as shown in FIG. 1a, a source line 6 is formed on a substrate 1 using a first mask. A first metal layer is deposited using a sputter and patterned to form the source line 6. A metal such as chromium, molybdenum, aluminum, titanium, tin, tungsten or copper may be used for the first metal layer. An aluminum alloy is preferred due to its low resistance.
To prevent a hillock that may occur while the first metal layer is deposited as well as to prevent an open line that may occur while the first metal layer is patterned to form the source line 6, and then a second metal layer 8 is deposited and patterned using a second mask. Molybdenum (Mo) or moly-tungsten (MoW) is usually used for the second metal layer 8. (See FIG. 1b).
As shown in FIG. 1c, a first insulation film 10 is deposited as an interlayer insulator, which is formed for the insulation between the source line 6 and an active layer that will be formed later. Then, an amorphous silicon layer (a-Si:H) 12 is deposited to form the active layer.
The first insulation film 10 is formed by the atmospheric pressure chemical vapor deposition (APCVD), and the amorphous silicon layer 12 is formed by plasma enhanced chemical vapor deposition (PECVD).
After the deposition, the amorphous silicon layer 12 is subject to a dehydrogenation process to remove the hydrogen bound in it, then to a crystallization process to produce Poly-Si. The dehydrogenation is to inhibit the production of voids during the crystallization and also to improve the electric properties of the crystallized Poly-Si.
As shown in FIG. 1d, islands of active layer 14 are formed by patterning the Poly-Si using a third mask.
As shown in FIG. 1e, a second insulation film 16 and a third metal layer are deposited, respectively by PECVD and sputtering, on the entire surface. Then, gate electrodes 20 and 22 are formed by patterning the third metal layer using a fourth mask. Also, thereafter, the second insulation film 16 is dry-etched to half of its original thickness. The insulation film 16 is not fully etched to protect the polycrystalline silicon layer 14 later in the process.
Next, as shown in FIG. 1f, ion doping is performed to form source/drain regions 28 and 30 of the Poly-Si active layer 14, excluding the portions underlying the gate electrodes 20 and 22. Then, first and second protection layers 24 and 26 are deposited on the entire surface.
Thereafter, contact holes 28xe2x80x2, 32 and 30xe2x80x2 are formed by a fifth masking process, as shown in FIG. 1g. 
As shown in FIG. 1h, transparent conductive material is deposited using a sixth mask to form a source electrode 38 and a drain/pixel electrode 40. The source electrode 38 connects the source line 6 and the source region 28 through the contact holes 32 and 28xe2x80x2, and the drain/pixel electrode 40 contacts the drain region 30 through the contact hole 30xe2x80x2.
The conventional art described has the following disadvantages. First, the number of masks required is high leading to misalignment and low yield.
Second, because the source electrode 38 contacts the source line 6 through the contact hole 32, the contact resistance may increase due to residual matter of the insulation film 10 such as SiO2, as a result of incomplete removal of the insulation film.
Accordingly, the present invention is directed to a TFT-LCD and a method for manufacturing the same that substantially obviates some or all of the problems due to the limitations and limitation related to the conventional art.
An object of this invention is to provide a TFT-LCD fabricated by four-mask process.
Another object of this invention is to provide a TFT-LCD in which the contact resistance by the contact between the source line and the source region of the active layer can be reduced.
A further object of this invention is to provide a TFT-LCD of low price by a simplified manufacture.
In order to achieve the objects, this invention provides, in one aspect, a reflective liquid crystal display device panel includes: a substrate; an insulation layer on the substrate; a semiconductor island on the insulation layer, having source and drain regions and a channel region disposed between the source and drain regions; a gate electrode over the channel region of the semiconductor island; a gate insulation layer between the gate electrode and the channel region of the semiconductor island; a protection layer covering the gate electrode and portions of the source and drain regions, the portions being adjacent to the channel region of the semiconductor island; an ohmic contact layer spaced from the protection layer and formed on the source and drain regions of the semiconductor island; source and drain electrodes formed on the ohmic contact layer, respectively, electrically contacting the source and drain regions of the semiconductor island; and a reflective electrode integrally formed with the drain electrode.
In another aspect, the present invention also provides a reflective liquid crystal display device panel includes: a substrate; an insulation layer on the substrate; a semiconductor island on the insulation layer, having a channel region, first regions adjacent to the channel region, and second regions adjacent to the first regions and positioned at either ends portion thereof; a gate electrode over the channel region of the semiconductor island; a gate insulation layer between the gate electrode and the channel region of the semiconductor island; a protection layer covering the gate electrode and the first regions of the semiconductor island; source and drain electrodes overlapping the second regions of the semiconductor island; and a reflective electrode integrally formed with the drain electrode, wherein the second regions has a lower doped density than the first regions of the semiconductor layer.
The present invention further contemplates a method for fabricating a reflective liquid crystal display device panel, includes the steps of: providing a substrate; forming a buffer layer on an entire surface of the substrate; forming an active island of a semiconductor on the buffer layer; forming a gate insulation film and a gate electrode on the active island, both having a smaller width than that of the active island; forming a protection film covering the gate electrode and a portion of the active island around the gate electrode; and sequentially depositing an impurity layer and a second metal layer on the entire surface of the substrate and patterning them as overlapping the active island and having a gap with the protection film, thereby to form an ohmic contact layer, source and drain electrodes overlapping the ohmic contact layer and a reflective electrode extended from the drain electrode.
The present invention further contemplates a method for providing a substrate; forming a buffer layer on an entire surface of the substrate; forming an active island of a semiconductor on the buffer layer; forming a gate insulation film and a gate electrode on the active island, both having a smaller width than that of the active island; n-type ion implanting the active island using the gate electrode as a first ion stopper; forming a protection film covering the gate electrode and a portion of the active island around the gate electrode; p-type ion implanting the active island using the protection film as a second ion stopper, gases for the p-type ion implantation having a lower ion density than those for the n-type ion implantation; and depositing a second metal layer on the entire surface of the substrate and patterning the second metal layer into forming source and drain electrodes overlapping the doped region of the active island and a reflective electrode extended from the drain electrode, the source and drain electrodes having a gap with the protection film.
The protection film is an organic insulation film made with a material selected from the group consisting of BCB (benzocyclobutene), acrylics and polyimide.
The semiconductor island is of polycrystalline silicon.
The reflective electrode has a plurality of bumps.
The present invention further includes a silicide layer on the ohmic contact layer.
The first and second regions of the semiconductor island have an n-type-doped composition.
The source and drain electrodes are spaced from the protection layer.
The present invention further includes a silicide process to form a silicide layer on the ohmic contact layer.
The silicide process includes an annealing process carried out at a temperature of about 200.
The active island is of polycrystalline silicon.